Awards and Research papers

KIOXIA has been highly commended for the presentation of its R&D through a variety of channels, including major academic societies and research papers.

Awards

2021

06-22-2021

Silver Prize of the 2020 Field Innovation Award from the Japanese Society for Artificial Intelligence (JSAI)

 

06-16-2021

2020 VLSI Test of Time Award

"A NAND Structured Cell with a New Programming Technology for Highly Reliable 5 V-only Flash EEPROM,"

 

06-16-2021

2020 VLSI Test of Time Award

"A Quick Intelligent Program Architecture for 3 V-only NAND-EEPROMs,"

 

05-25-2021

JIII 2021 National Commendation for Invention "Invention Prize"
"Semiconductor flash memory extension-of-life-span technology" (patent no. 4461170).

 

04-09-2021

IEEE EDTM2021 Best Paper Award

”Cryogenic Operation of 3D Flash Memory for New Applications and Bit Cost Scaling with 6-Bit per Cell (HLC) and Beyond”

2020

09-24-2020

JIII 2020 National Commendation for Invention "Imperial Invention Prize"
"High Density 3D Flash Memory Device and Manufacturing Method Thereof" (patent no. 5016832).

 

03-13-2020

18th JSAP Plasma Electronics Award

 

03-12-2020

APEX/JJAP Editorial Contribution Award from The Japan Society of Applied Physics

2019

11-27-2019

The Sort Benchmark committee JouleSort World Record *1

 

11-19-2019

NANOTS2019 Best Interested Paper Award, Young Researcher's Encouragement Award

 

11-13-2019

AEC/APC Symposium Asia 2019 Best Paper Award

"Robust Estimation of Mixed-Type Wafer Map Similarity Utilizing Non-negative Matrix Factorization"

 

11-05-2019

A-SSCC Outstanding Contribution Award


09-18-2019

The 13th (2019) JSAP Fellow Award

 

03-10-2019

17th JSAP Plasma Electronics Award

 


03-09-2019

JSAP Young Scientist Presentation Award

 

02-19-2019

IEEE SSCS Japan Industry Contribution Award

 

01-17-2019

20th JSPS Plasma Science for Materials Award

 

*1…As of Nov. 27, 2019 (1TB Sort/89kJoules)

2018

11-13-2018

DPS2018 Nishizawa Award

 

10-27-2018

Special Jury Award of the 2018 Incentive Award to Young Woman Engineer from Japan Women Engineers Forum (JWEF)

 

09-18-2018

The 12th (2018) JSAP Fellow Award

 

09-11-2018

Connect Products and Services category in the field of Business Impact of the 6th Cloudera Data Impact Awards

 

06-06-2018

Award for Excellence of the 24th Semiconductor of the Year 2018 in the field of semiconductor devices from Electronic Device Industry News

2017

11-22-2017

IWDTF Young Award

 

11-16-2017

DPS2017 DPS Paper Award

 

11-10-2017

NANOTS2017 Best Interested Paper Award

 

08-04-2017

70th (2016): Technological Development Encouragement Prize from the Motion Picture and Television Engineering Society of Japan, Inc.

 

06-26-2017

Gold Prize of the 2016 Field Innovation Award from the Japanese Society for Artificial Intelligence (JSAI)

 

04-28-2017

Technical Development Prize (Progress & Development Prize) in the field of R&D of the 44th (2016) Technology Development Award from the Institute of Image Information and Television Engineers

 

03-24-2017

63rd (2016) Okochi Memorial Prize from the Okochi Memorial Foundation

 

02-14-2017

The Minister of Economy, Trade and Industry Prize of the 5th Management of Technology (MOT) & Innovation Award from Japan Techno-Economics Society (JATES)

Company names, product names, and service names mentioned herein may be trademarks of respective companies.

Research papers

2021 Conference Presentation and Publication List*

* All authors at submission are basically our company's employees. Written in English.

Approaching DRAM performance by using microsecond-latency flash memory for small-sized random read accesses: a new access method and its graph applications

  • T. Suzuki, et al.
  • Proceedings of the VLDB Endowment, 14(8), pp. 1311 – 1324

 

Metal diffusion model in polymer matrices in vapor phase infiltration

  • N. Sasao, et al.
  • Japanese Journal of Applied Physics, 60,SCCC04

 

Applications of AI Technologies in Flash Memory Business

  • R. Orihara
  • 2021 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021, 9421020

 

Cryogenic Operation of 3D Flash Memory for New Applications and Bit Cost Scaling with 6-Bit per Cell (HLC) and beyond

  • Y Aiba, et al.
  • 2021 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021, 9421051

 

Challenges of Flash Memory for Next Decade (Invited)

  • K. Ishimaru
  • IEEE International Reliability Physics Symposium Proceedings, 2021-March,9405182

 

In-line schematic failure analysis technique by defect SEM images

  • J. Okude, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering, 11611,116110M

 

Measurability analysis of the HAR structure in 3D memory by T-SAXS simulation

  • K. Sasaki, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering, 11611,116110U

 

Preventing method of volume expansion of polymer after metal infiltration

  • N. Sasao, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering 11612,1161209

 

Multi-field imprint technology: Enabling the productivity enhancement of NIL

  • T. Nakasugi, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering, 11610,1161008

 

2020 Conference Presentation and Publication List*

* All authors at submission are basically our company's employees. Written in English.

Quality-Oriented Statistical Process Control Utilizing Bayesian Modeling

  • K. Date, et al.
  • IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings, 2020-December,9377496

 

HfO2-based FeFET and FTJ for ferroelectric-memory centric 3D LSI towards low-power and high-density storage and AI applications (Invited)

  • M. Saitoh, et al.
  • Technical Digest - International Electron Devices Meeting, IEDM, 2020-December,9372106, pp. 18.1.1-18.1.4

 

Design principle of channel material for oxide-semiconductor field-effect transistor with high thermal stability and high on-current by fluorine doping

  • H. Kawai, et al.
  • Technical Digest - International Electron Devices Meeting, IEDM, 2020-December,9372121, pp. 22.2.1-22.2.4

 

Surrounding Gate Vertical-Channel FET with a Gate Length of 40 nm Using BEOL-Compatible High-Thermal-Tolerance In-Al-Zn Oxide Channel

  • H. Fujiwara, et al.
  • IEEE Transactions on Electron Devices, 67(12),9199412, pp. 5329-5335

 

An Effective Learning Scheme for Weighted-BP with Parallel Permutation Decoding

  • R. Yoshizawa, et al.
  • Proceedings of 2020 International Symposium on Information Theory and its Applications, ISITA 2020, 9366111, pp. 86-90

 

A Noise-Canceling Charge Pump for Area Efficient PLL Design

  • G. Urakawa, et al.
  • 2020 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2020, 9226191, pp. 31-33

 

4-port 10 MHz-67 GHz Broadband Measurement of FR-4 PCB Transmission Lines for 64-Gb/s PAM-4 Signaling

  • Y. Tsubouchi, et al.
  • 2020 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2020, 9226185, pp. 7-9

 

Empowering Next-Generation Applications through FLASH Innovation (Plenary)

  • S. J. Ohshima
  • Digest of Technical Papers - Symposium on VLSI Technology, 2020-June,9265031

 

Impact of Zr Concentration on Time-Dependent Dielectric Breakdown of HfZrO-based Ferroelectric Tunnel Junction (FTJ) Memory

  • M. Yamaguchi, et al.
  • 2020 International Conference on Solid State Devices and Materials (SSDM2020), B-2-01

 

New Material Approach to Enhance Spontaneous Polarization in Ferroelectric HfO2

  • K. Takahash, et al.
  • 2020 International Conference on Solid State Devices and Materials (SSDM2020), B-2-03

 

Suppression of Channel Shortening and Reduction of S/D Parasitic Resistance in InGaZnO channel BEOL Transistor by Insertion of thermally stable InAlZnO Contact Layer

  • Y. Sato, et al.
  • 2020 International Conference on Solid State Devices and Materials (SSDM2020), J-6-02

 

Improved state stability of HfO2 ferroelectric tunnel junction by template-induced crystallization and remote scavenging for efficient in-memory reinforcement learning

  • S. Fujii, et al.
  • Digest of Technical Papers - Symposium on VLSI Technology, 2020-June,9265031

 

Re-examination of Vth Window and Reliability in HfO2 FeFET Based on the Direct Extraction of Spontaneous Polarization and Trap Charge during Memory Operation

  • R. Ichihara, et al.
  • Digest of Technical Papers - Symposium on VLSI Technology, 2020-June,9265055

 

Surrounding Gate Vertical-Channel FET with Gate Length of 40 nm Using BEOL Compatible High-Thermal-Tolerance In-Al-Zn Oxide Channel

  • H. Fujiwara, et al.
  • Digest of Technical Papers - Symposium on VLSI Technology, 2020-June,9265109

 

Combination of Transistors' compact model and Big Data for successful Smart Factory

  • S. Yoshitomi.
  • 3rd International Symposium on Devices, Circuits and Systems, ISDCS 2020 – Proceedings, 9262981

 

Polymer Designs for Dense Metal Infiltration for Higher Dry-etch Resistance

  • N. Sasao, et. al.
  • Japanese Journal of Applied Physics 59(SI),SIIC02

 

Template development for sub15nm nanoimprint lithography

  • R. Seki, et al.
  • Proc. SPIE. 11178, Photomask Japan 2019: XXVI Symposium on Photomask and Next-Generation Lithography Mask Technology; 111780S (2020)

 

A TCAD Study on Mechanism and Countermeasure for Program Characteristics Degradation of 3D Semicircular Charge Trap Flash Memory

  • N. Kariya, et al.
  • 2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)

 

Weight compression MAC accelerator for effective inference of deep learning

  • A. Maki, et al.
  • IEICE Transactions on Electronics, E103C(10), pp. 514-523

 

Experimental Extraction of Impact of Depletion Capacitance on Low Frequency Noise in Sub-Micron nMOSFETs with Reverse Body Bias

  • C. Tanaka, et al.
  • IEEE Transactions on Semiconductor Manufacturing, 33(2),9050647, pp. 146-149

 

Novel Statistical Modeling and Parameter Extraction Methodology of Cutoff Frequency for RF-MOSFETs

  • C. Tanaka, et al.
  • IEEE International Conference on Microelectronic Test Structures, 2020-May,9107914

 

Thyristor Operation for High Speed Read/Program Performance in 3D Flash Memory with Highly Stacked WL-Layers

  • H. Horii, et al.
  • 2020 IEEE International Memory Workshop, IMW 2020 – Proceedings, 9108147

 

Emerging Usage and Evaluation of Low Latency FLASH

  • T. Shiozawa, et al.
  • 2020 IEEE International Memory Workshop, IMW 2020 – Proceedings, 9108145

 

Breakdown Lifetime Analysis of HfO2-based Ferroelectric Tunnel Junction (FTJ) Memory for In-Memory Reinforcement Learning

  • M. Yamaguchi, et al.
  • IEEE International Reliability Physics Symposium Proceedings, 2020-April, 9129314

 

Further Investigation on Mechanism of Trap Level Modulation in Silicon Nitride Films by Fluorine Incorporation

  • H. Seki, et al.
  • IEEE International Reliability Physics Symposium Proceedings, 2020-April,9128224

 

Experimental Extraction of Impact of Depletion Capacitance on Low Frequency Noise in Sub-Micron nMOSFETs with Reverse Body Bias

  • C. Tanaka, et al.
  • IEEE Transactions on Semiconductor Manufacturing, 33(2),9050647, pp. 146-149

 

Ab initio calculation of interlayer exchange coupling in Co-based synthetic antiferromagnet with alloy spacer

  • R. Takashima, et al.
  • AIP Advances, 10(1),015324

 

Process technologies leading a future of semiconductor memory (KIOKU) devices (Plenary)

  • K. Hashimoto
  • SPIE advanced lithography 2020, Technical Program pp.6-7, 11323-501

2019 Conference Presentation and Publication List*

* All authors at submission are basically our company's employees. Written in English.

Formation of High Reliability Hydrogen-free MONOS Cells Using Deuterated Ammonia

  • M. Noguchi, et al.
  • Technical Digest - International Electron Devices Meeting, IEDM, 2019-December,8993586


Can in-memory/analog accelerators be a silver bullet for energy-efficient inference?

  • J. Deguchi, et al.
  • Technical Digest - International Electron Devices Meeting, IEDM, 2019-December,8993500


Future of Non-Volatile Memory -From Storage to Computing- (Plenary)

  • K. Ishimaru
  • Technical Digest - International Electron Devices Meeting, IEDM, 2019-December,8993609


High-Efficient Adaptive Modulation for PWM-Based Multi-Level Perpendicular Magnetic Recording on Insufficient Resolution Channel

  • K. Harada
  • IEEE Transactions on Magnetics, 55(11),8784414


Multi-Level Modulation for High-Speed Wireless and Wireline Transceivers

  • R. Fujimoto
  • 2019 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2019 – Proceedings, 8929137


A perspective on NVRAM technology for future computing system

  • K. Hoya, et al.
  • 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019, 8741675


Novel cleaning technology for nanoparticle removal

  • M. Tanabe, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering, 11148,111480N


Capability of DUV inspection for the LWR improved EUV mask of sub-15 nm hp on wafer

  • M. Naka, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering, 11148,111480X


Low Operation Current Cell Technology for Terabit-Scale Memory Applications (Invited)

  • M. Saitoh, et al.
  • Non-Volatile Memory Technology Symposium 2019 (NVMTS2019), pp.98-99


Current-Induced Domain Wall Motion in Pd-based Multilayered Structures with Different Ferromagnetic Layer Composition

  • M. Kado, et al.
  • 64th Annual Conference on Magnetism and Magnetic Materials (MMM2019), HB-03


Robust Estimation of Mixed Type Wafer Map Similarity Utilizing Non negative Matrix

  • Y. Tanaka, et al
  • Proceedings of AEC/APC Symposium Asia 2019, TDA-022.


High Performance In-Zn-O FET with High On-current and Ultralow (<10-20 A/μm) Off-state Leakage Current for Si CMOS BEOL Application

  • N. Saito, et al.
  • AM-FPD 2019 - 26th International Workshop on Active-Matrix Flatpanel Displays and Devices: TFT Technologies and FPD Materials, Proceedings 8830602


Random Telegraph Noise after Hot Carrier Injection in Tri-gate Nanowire Transistor

  • K. Ota, et al.
  • 2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019, 8731025, pp. 169-171


Multi-criteria hotspot detection using pattern classification

  • K. Shiozawa, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering, 10962,109620T


Lithography hotspot candidate detection using coherence map

  • T. Matsunawa, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering, 10962,109620Q


Half-pitch 14nm direct patterning with nanoimprint lithography

  • T. Kono, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering, 10958,109580H


Tungsten/In-Sn-O stacked source/drain electrode structure of In-Ga-Zn-O thin-film transistor for low-contact resistance and suppressing channel shortening effect

  • J. Kataoka, et al.
  • Japanese Journal of Applied Physics, 58(SB),SBBJ03


Next Generation Memory System in Data-centric Computing

  • M. Takahashi, et al.
  • 2019 International Conference on Solid State Devices and Materials (SSDM2019), H-5-01 (Invited)


ReRAM Opportunities for In-Memory Computing

  • K. Ota
  • 2019 International Conference on Solid State Devices and Materials (SSDM2019), Short Course A-04


Advanced Plasma Etching for the State-of-the-Arts Memories

  • H. Hayashi, et al.
  • 2019 International Conference on Solid State Devices and Materials (SSDM2019), Satellite Workshop SW-03


Experimental Extraction of Body Bias Dependence of Low Frequency Noise in sub-micron MOSFETs from Subthreshold to Moderate Inversion Regime

  • C. Tanaka, et. al.
  • IEEE International Conference on Microelectronic Test Structures, ICMTS-2019, 8730953, pp. 162-165


Post Training Weight Compression with Distribution-based Filter-wise Quantization Step

  • S. Sasaki, et al.
  • IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings 8721356


Ag Ionic Memory Cell Technology for Terabit-Scale High-Density Application

  • S. Fujii, et al.
  • IEEE Symposium on VLSI Technology, Digest of Technical Papers, pp. TT189-TT190


Overview in Three-Dimensionally Arrayed Flash Memory Technology

  • R. Katsumata
  • IEEE Symposia on VLSI Technology and Circuits, Short Course 1


A 12.8-Gb/s Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth, Large-Capacity Storage Systems

  • Y. Tsubouchi, et al.
  • IEEE Journal of Solid-State Circuits, 54(4),8613011, pp. 1086-1095


Live demonstration: FPGA-based CNN accelerator with filter-wise-optimized bit precision

  • K. Nakata, et al.
  • Proceedings - IEEE International Symposium on Circuits and Systems, 2019-May, 8702208


Circuit-size reduction for parallel chien search using minimal polynomial degree reduction

  • N. Kokubun, et al.
  • Proceedings - IEEE International Symposium on Circuits and Systems, 2019-May, 8702075


Grain-boundary-limited carrier mobility in polycrystalline silicon with negative temperature dependence: Modeling carrier conduction through grain-boundary traps based on trap-assisted tunneling

  • M. Hogyoku, et al.
  • Japanese Journal of Applied Physics, 58(SB), SBBA01


Comprehensive study of variability in poly-Si channel nanowire transistor

  • K. Ota, et al.
  • Japanese Journal of Applied Physics, 58(SB), SBBA06


Evaluation of electron traps in SiNx by discharge current transient spectroscopy: Verification of validity by comparing with conventional DLTS

  • H. Seki, et al.
  • Japanese Journal of Applied Physics, 58(SB), SBBK02


High mobility (>30 cm2 V-1 s-1) and low source/drain parasitic resistance In-Zn-O BEOL transistor with ultralow <10-20 A μm-1 off-state leakage current

  • N. Saito, et al.
  • Japanese Journal of Applied Physics, 58(SB), SBBJ07


Investigation of Switching-Induced Local Defects in Oxide-Based CBRAM Using Expanded Analytical Model of TDDB

  • R. Ichihara, et al.
  • IEEE Transactions on Electron Devices, 66(5), 8676360, pp. 2165-2171


A 25.6Gb/s Uplink-Downlink Interface Employing PAM-4-Based 4-Channel Multiplexing and Cascaded CDR Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems

  • T. Toi, et al.
  • Digest of Technical Papers - IEEE International Solid-State Circuits Conference, pp. 478 - 480


Device Challenges and Opportunities for ReRAM

  • K. Ota
  • IEEE International Reliability Physics Symposium, IRPS 2019 - Tutorial


3D Flash Memory - Electrical and Physical Characterizations for Memory Cell Reliability -

  • Y. Mitani
  • IEEE International Conference on Microelectronic Test Structures, ICMTS 2019 - Tutorial

2018 Conference Presentation and Publication List*

* All authors at submission are basically our company's employees. Written in English.

Improving thickness uniformity of sputter-deposited films by using magnet rotation speed control technique

  • T. Miura, et al.
  • IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings, 2018-December, 8651152


Fixed charge control of silylated surface for stiction-free drying with surface energy reduction process

  • T. Koide, et al.
  • Solid State Phenomena, 282 SSP, pp. 168-174


Deep Learning in DFM Applications

  • T. Matsunawa, et. al.
  • Proceedings Volume 10810, Photomask Technology 2018; 1081006


FPGA-Based CNN Processor with Filter-Wise-Optimized Bit Precision

  • A. Maki, et al.
  • Proceedings of 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC2018) pp.47-50


Non-Volatile Memory for Data Age (Invited)

  • K. Ishimaru
  • Proceedings of the International Conference on Solid-State and Integrated Technology 2018 (ICSICT-2018) pp. 1215-1218


Formation Mechanism of Sidewall Striation in High-Aspect-Ratio Hole Etching

  • M. Omura, et al.
  • 40th International Symposium on Dry Process (DPS2018), H-2, pp. 293-294


Footprints of RF CMOS Compact Modeling Technology from Wireless Communication to IoT Applications

  • S. Yoshitomi
  • Proceedings of 25th International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2018, 8436911, pp. 22-28


Evaluation of Electron Traps in SiN by Discharging Current Transient Spectroscopy: Verification of Validity by Comparing with Conventional DLTS

  • H. Seki, et al.
  • 2018 International Conference on Solid State Devices and Materials (SSDM2018) pp.325-326


High mobility (>30 cm2/Vs) and Low S/D Parasitic Resistance In-Zn-O BEOL Transistor with Ultralow (<10-20 A/μm) Off Leakage Current

  • N. Saito, et al.
  • 2018 International Conference on Solid State Devices and Materials (SSDM2018) pp.573-574


Performance improvement by template-induced crystallization in ferroelectric HfO2 tunnel junction memory for cross-point high-density application

  • S. Kabuyanagi, et al.
  • 2018 International Conference on Solid State Devices and Materials (SSDM2018) pp.205-206


Effect of Tin and Gallium Composition on the Instability of Amorphous Indium-Gallium-Zinc-Tin-Oxide (IGZTO) Thin-Film Transistors under Positive Gate Bias

  • D. Zhao, et al.
  • 2018 International Conference on Solid State Devices and Materials (SSDM2018) pp.805-806 (Late News)


Grain-Boundary-Limited Polycrystalline-Silicon Mobility with Negative Temperature Dependence ~ Modeling of Carrier Conduction through Grain-Boundary Traps Based on Trap-Assisted Tunneling ~

  • M. Hogyoku, et al.
  • 2018 International Conference on Solid State Devices and Materials (SSDM2018) pp. 825-826


Stacked Source/Drain Electrode Structure of InGaZnO Thin-Film-Transistor for Low Contact Resistance and Suppressing Channel Shortening Effect

  • J. Kataoka, et al.
  • 2018 International Conference on Solid State Devices and Materials (SSDM2018) pp.1269-1270 (Late News)


Comprehensive Study of Variability in Poly-Si Channel Nanowire Transistor ~ Grain Boundary effect in Variability ~

  • K. Ota, et al.
  • 2018 International Conference on Solid State Devices and Materials (SSDM2018) pp.235-236 (Late News)


Emerging Non-Volatile Memory and Thin-Film Transistor Technologies for Future 3D-LSI (Invited)

  • M. Saitoh, et al.
  • 48th European Solid-State Device Research Conference (ESSDERC) 2018, pp.138-141


Performance and Reliability of Ferroelectric HfO2 Tunnel Junction Memory (Invited)

  • S. Fujii, et al.
  • 2018 ISAF-FMA-AMF-AMEC-PFM Joint Conference (IFAAP2018)


Reliability of HfO2-based Ferroelectric Tunnel Junction Memory (Invited)

  • M. Yamaguchi, et al.
  • Non-Volatile Memory Technology Symposium 2018 (NVMTS2018)


A 12.8 Gb/s Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth and Large-Capacity Storage Systems

  • Y. Tsubouchi, et al.
  • IEEE Symposium on VLSI Circuits, Digest of Technical Papers, pp. 149-150


Suppression of channel shortening effect for InGaZnO Thin-Film-Transistor by In-Sn-O source/drain electrodes

  • J. Kataoka, et al.
  • 2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings 8421427, pp. 175-177


Origin of High Mobility in InSnZnO MOSFETs

  • N. Saito, et al.
  • 2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 -Proceedings 8421530, pp. 172-174


3D Flash Memory for Data-Intensive Applications (Keynote)

  • S. Inaba
  • 2018 IEEE 10th International Memory Workshop, IMW 2018 pp. 1-4


Comprehensive investigation on parameter extraction methodology for short channel amorphous-InGaZnO thin-film transistor

  • C. Tanaka, et al.
  • IEEE International Conference on Microelectronic Test Structures 2018-March, pp. 23-26


Cooperative simulation of lithography and topography for three-dimensional high-aspect-ratio etching

  • T. Ichikawa, et al.
  • Japanese Journal of Applied Physics 57(6), 06JC01


Multiscale modeling for SiO2 atomic layer deposition for high-aspect-ratio hole patterns

  • Y. Miyano, et al.
  • Japanese Journal of Applied Physics 57(6), 06JB03


Hot carrier degradation, TDDB, and 1/f noise in Poly-Si Tri-gate nanowire transistor

  • Y. Yoshimura, et al.
  • IEEE International Reliability Physics Symposium Proceedings 2018-March, pp. 5A.61-5A.66


Density-functional study on the dopant-segregation mechanism: Chemical potential dependence of dopant-defect complex at Si/SiO2 interface

  • H. Kawai, et al.
  • Journal of Applied Physics 123(16), 161425


Charge-based Neuromorphic Cell by InGaZnO Transistor and Implementation of Simple Scheme Spike-Timing-Dependent Plasticity

  • C. Tanaka, et al.
  • Proceedings - IEEE International Symposium on Circuits and Systems 2018-May, 8350932


Hotspot detection based on surrounding optical feature

  • Y. Abe, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering 10588, 105880I


Updates of nanoimprint lithography for production and applications for next generation memory devices

  • T. Higashiki
  • Proceedings of SPIE - The International Society for Optical Engineering 10584, 105840T


Origin of high mobility in InSnZnO MOSFETs

  • N. Saito, et al.
  • IEEE Journal of the Electron Devices Society 6,8546783, pp. 1258-1262

2017 Conference Presentation and Publication List*

* All authors at submission are basically our company's employees. Written in English.

Study of CO2 ashing for porous SiOCH film using 100 MHz/13.56 MHz dual frequency superimposed capacitive coupled plasma

  • T. Imamura, et al.
  • Journal of Vacuum Science and Technology B: Nanotechnology and Microelectronics 35(6), 062201


Development of an Energy-Saving Controller for Sub Apparatus

  • T. Ozaki
  • IEEE Transactions on Semiconductor Manufacturing 30(4), 8057857, pp. 367-370


Metrology and inspection required for next generation lithography

  • M. Asano, et al.
  • Japanese Journal of Applied Physics 56(6), 06GA01


Application of EB repair for nanoimprint lithography template

  • A, Kumada, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering 10454, 104540Q


Accurate lithography simulation model based on convolutional neural networks

  • Y. Watanabe, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering 10454, 104540I


DUV inspection beyond optical resolution limit for EUV mask of hp 1X nm

  • M. Naka, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering 10451, 104510K


Multi-scale modeling for SiO2 plasma-enhanced atomic layer deposition at high-aspect-ratio hole patterns

  • Y. Miyano, et al.
  • 39th International Symposium on Dry Process (DPS2017), B-3, pp. 19-20