表彰・研究論文

キオクシアは主要学会や論文での発表を行っており、高い評価を受けています。

表彰

2021年

2021年04月09日

IEEE EDTM2021 Best Paper Award

「Cryogenic Operation of 3D Flash Memory for New Applications and Bit Cost Scaling with 6-Bit per Cell (HLC) and Beyond」

2020年

2020年09月24日

公益社団法人発明協会 令和2年度全国発明表彰 恩賜発明賞

「超高密度3次元フラッシュメモリ構造とその製造方法の発明」(特許第5016832号)

 

2020年03月13日

応用物理学会 第18回(2019年度)プラズマエレクトロニクス賞

 

2020年03月12日

公益社団法人応用物理学会 APEX/JJAP編集貢献賞

2019年

2019年11月27日

ソートベンチマーク委員会 ジュールソート部門ワールドレコード *1

 

2019年11月22日

公益社団法人発明協会 令和元年度中部地方発明表彰 文部科学大臣賞

「3次元フラッシュメモリの発明」(特許第5016832号)

 

2019年11月19日

ナノテスティングシンポジウム NANOTS2019 Best Interested Paper Award、若手奨励賞

 

2019年11月13日

AEC/APC Symposium Asia 2019 Best Paper Award

「Robust Estimation of Mixed-Type Wafer Map Similarity Utilizing Non-negative Matrix Factorization」

 

2019年11月05日

A-SSCC Outstanding Contribution Award


2019年09月18日

応用物理学会 第13回(2019年度)応用物理学会フェロー表彰

 

2019年03月10日

応用物理学会 第17回(2018年度)プラズマエレクトロニクス賞


2019年03月09日

応用物理学会 第45回(2018年秋季)応用物理学会講演奨励賞

 

2019年02月19日

IEEE SSCS Japan Industry Contribution Award

 

2019年01月17日

JSPS プラズマ材料科学賞 第20回 技術部門賞

 

*1…2019/11/27時点(1TBソート/89Kジュール)

2018年

2018年11月13日

DPS2018 西澤賞

 

2018年10月27日

日本女性技術者フォーラム 2018年 JWEF奨励賞 審査員特別賞

 

2018年09月18日

応用物理学会 第12回(2018年度)応用物理学会フェロー表彰

 

2018年09月11日

cloudera 第6回 Data Impact Awardsビジネスインパクト部門Connect Products and Services

 

2018年06月06日

電子デバイス産業新聞 第24回半導体・オブ・ザ・イヤー2018 半導体デバイス部門 優秀賞

2017年

2017年11月22日

IWDTF Young Award

 

2017年11月16日

DPS2017 DPS Paper Award

 

2017年11月10日

ナノテスティングシンポジウム NANOTS2017 Best Interested Paper Award

 

2017年08月04日

日本映画テレビ技術協会 第70回(2016年度)技術開発奨励賞

 

2017年06月26日

人工知能学会 2016年度 現場イノベーション賞 金賞

 

2017年04月28日

映像情報メディア学会 第44回(2016年度)技術振興賞 進歩開発賞(研究開発部門)

 

2017年03月24日

大河内記念会 第63回(平成28年度)大河内記念賞

 

2017年02月14日

科学技術と経済の会(JATES) 第5回技術経営・イノベーション賞 経済産業大臣賞

その他、本ページに記載されている社名・商品名・サービス名などは、それぞれ各社が商標として使用している場合があります。

研究論文

2020年 主要学会発表・パブリケーションリスト

※:投稿時点で原則著者全員が当社従業員の学会発表・論文

A TCAD Study on Mechanism and Countermeasure for Program Characteristics Degradation of 3D Semicircular Charge Trap Flash Memory

  • N. Kariya, et al.
  • 2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)

 

Weight compression MAC accelerator for effective inference of deep learning

  • A. Maki, et al.
  • IEICE Transactions on Electronics, E103C(10), pp. 514-523

 

Experimental Extraction of Impact of Depletion Capacitance on Low Frequency Noise in Sub-Micron nMOSFETs with Reverse Body Bias

  • C. Tanaka, et al.
  • IEEE Transactions on Semiconductor Manufacturing, 33(2),9050647, pp. 146-149

 

Novel Statistical Modeling and Parameter Extraction Methodology of Cutoff Frequency for RF-MOSFETs

  • C. Tanaka, et al.
  • IEEE International Conference on Microelectronic Test Structures, 2020-May,9107914

 

Thyristor Operation for High Speed Read/Program Performance in 3D Flash Memory with Highly Stacked WL-Layers

  • H. Horii, et al.
  • 2020 IEEE International Memory Workshop, IMW 2020 – Proceedings, 9108147

 

Emerging Usage and Evaluation of Low Latency FLASH

  • T. Shiozawa, et al.
  • 2020 IEEE International Memory Workshop, IMW 2020 – Proceedings, 9108145

 

Breakdown Lifetime Analysis of HfO2-based Ferroelectric Tunnel Junction (FTJ) Memory for In-Memory Reinforcement Learning

  • M. Yamaguchi, et al.
  • IEEE International Reliability Physics Symposium Proceedings, 2020-April, 9129314

 

Further Investigation on Mechanism of Trap Level Modulation in Silicon Nitride Films by Fluorine Incorporation

  • H. Seki, et al.
  • IEEE International Reliability Physics Symposium Proceedings, 2020-April,9128224

 

Experimental Extraction of Impact of Depletion Capacitance on Low Frequency Noise in Sub-Micron nMOSFETs with Reverse Body Bias

  • C. Tanaka, et al.
  • IEEE Transactions on Semiconductor Manufacturing, 33(2),9050647, pp. 146-149

 

Ab initio calculation of interlayer exchange coupling in Co-based synthetic antiferromagnet with alloy spacer

  • R. Takashima, et al.
  • AIP Advances, 10(1),015324

 

Process technologies leading a future of semiconductor memory (KIOKU) devices (Plenary)

  • K. Hashimoto
  • SPIE advanced lithography 2020, Technical Program pp.6-7, 11323-501

2019年 主要学会発表・パブリケーションリスト

※:投稿時点で原則著者全員が当社従業員の学会発表・論文

NAND型フラッシュメモリにおける材料の選定と開発

  • 魚住宜弘
  • 日本材料科学会会誌 材料の科学と工学, 56巻2号, pp.44-48

 

Formation of High Reliability Hydrogen-free MONOS Cells Using Deuterated Ammonia

  • M. Noguchi, et al.
  • Technical Digest - International Electron Devices Meeting, IEDM, 2019-December,8993586

 

Can in-memory/analog accelerators be a silver bullet for energy-efficient inference?

  • J. Deguchi, et al.
  • Technical Digest - International Electron Devices Meeting, IEDM, 2019-December,8993500

 

Future of Non-Volatile Memory -From Storage to Computing- (Plenary)

  • K. Ishimaru
  • Technical Digest - International Electron Devices Meeting, IEDM, 2019-December,8993609

 

High-Efficient Adaptive Modulation for PWM-Based Multi-Level Perpendicular Magnetic Recording on Insufficient Resolution Channel

  • K. Harada
  • IEEE Transactions on Magnetics, 55(11),8784414

 

Multi-Level Modulation for High-Speed Wireless and Wireline Transceivers

  • R. Fujimoto
  • 2019 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2019 – Proceedings, 8929137

 

A perspective on NVRAM technology for future computing system

  • K. Hoya, et al.
  • 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019, 8741675

 

Novel cleaning technology for nanoparticle removal

  • M. Tanabe, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering, 11148,111480N

 

Capability of DUV inspection for the LWR improved EUV mask of sub-15 nm hp on wafer

  • M. Naka, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering, 11148,111480X

 

Low Operation Current Cell Technology for Terabit-Scale Memory Applications (Invited)

  • M. Saitoh, et al.
  • Non-Volatile Memory Technology Symposium 2019 (NVMTS2019), pp.98-99

 

Current-Induced Domain Wall Motion in Pd-based Multilayered Structures with Different Ferromagnetic Layer Composition

  • M. Kado, et al.
  • 64th Annual Conference on Magnetism and Magnetic Materials (MMM2019), HB-03

 

Robust Estimation of Mixed Type Wafer Map Similarity Utilizing Non negative Matrix

  • Y. Tanaka, et al
  • Proceedings of AEC/APC Symposium Asia 2019, TDA-022.

 

High Performance In-Zn-O FET with High On-current and Ultralow (<10-20 A/μm) Off-state Leakage Current for Si CMOS BEOL Application

  • N. Saito, et al.
  • AM-FPD 2019 - 26th International Workshop on Active-Matrix Flatpanel Displays and Devices: TFT Technologies and FPD Materials, Proceedings 8830602

 

Random Telegraph Noise after Hot Carrier Injection in Tri-gate Nanowire Transistor

  • K. Ota, et al.
  • 2019 Electron Devices Technology and Manufacturing Conference, EDTM 2019, 8731025, pp. 169-171

 

Multi-criteria hotspot detection using pattern classification

  • K. Shiozawa, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering, 10962,109620T

 

Lithography hotspot candidate detection using coherence map

  • T. Matsunawa, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering, 10962,109620Q

 

Half-pitch 14nm direct patterning with nanoimprint lithography

  • T. Kono, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering, 10958,109580H

 

Tungsten/In-Sn-O stacked source/drain electrode structure of In-Ga-Zn-O thin-film transistor for low-contact resistance and suppressing channel shortening effect

  • J. Kataoka, et al.
  • Japanese Journal of Applied Physics, 58(SB),SBBJ03

 

Post Training Weight Compression with Distribution-based Filter-wise Quantization Step

  • S. Sasaki, et al.
  • IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings 8721356

 

Next Generation Memory System in Data-centric Computing

  • M. Takahashi, et al.
  • 2019 International Conference on Solid State Devices and Materials (SSDM2019), H-5-01 (Invited)

 

ReRAM Opportunities for In-Memory Computing

  • K. Ota
  • 2019 International Conference on Solid State Devices and Materials (SSDM2019), Short Course A-04

 

Advanced Plasma Etching for the State-of-the-Arts Memories

  • H. Hayashi, et al.
  • 2019 International Conference on Solid State Devices and Materials (SSDM2019), Satellite Workshop SW-03

 

Device Challenges and Opportunities for ReRAM

  • K. Ota
  • IEEE International Reliability Physics Symposium, IRPS 2019 - Tutorial

 

3D Flash Memory - Electrical and Physical Characterizations for Memory Cell Reliability -

  • Y. Mitani
  • IEEE International Conference on Microelectronic Test Structures, ICMTS 2019 - Tutorial

 

Experimental Extraction of Body Bias Dependence of Low Frequency Noise in sub-micron MOSFETs from Subthreshold to Moderate Inversion Regime

  • C. Tanaka, et. al.
  • IEEE International Conference on Microelectronic Test Structures, 2019-March, 8730953, pp. 162-165

 

Ag Ionic Memory Cell Technology for Terabit-Scale High-Density Application

  • S. Fujii, et al.
  • IEEE Symposium on VLSI Technology, Digest of Technical Papers, pp. TT189-TT190

 

Overview in Three-Dimensionally Arrayed Flash Memory Technology

  • R. Katsumata
  • IEEE Symposia on VLSI Technology and Circuits, Short Course 1

 

A 12.8-Gb/s Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth, Large-Capacity Storage Systems

  • Y. Tsubouchi, et al.
  • IEEE Journal of Solid-State Circuits, 54(4),8613011, pp. 1086-1095

 

Live demonstration: FPGA-based CNN accelerator with filter-wise-optimized bit precision

  • K. Nakata, et al.
  • Proceedings - IEEE International Symposium on Circuits and Systems, 2019-May, 8702208

 

Circuit-size reduction for parallel chien search using minimal polynomial degree reduction

  • N. Kokubun, et al.
  • Proceedings - IEEE International Symposium on Circuits and Systems, 2019-May, 8702075

 

Grain-boundary-limited carrier mobility in polycrystalline silicon with negative temperature dependence: Modeling carrier conduction through grain-boundary traps based on trap-assisted tunneling

  • M. Hogyoku, et al.
  • Japanese Journal of Applied Physics, 58(SB), SBBA01

 

Comprehensive study of variability in poly-Si channel nanowire transistor

  • K. Ota, et al.
  • Japanese Journal of Applied Physics, 58(SB), SBBA06

 

Evaluation of electron traps in SiNx by discharge current transient spectroscopy: Verification of validity by comparing with conventional DLTS

  • H. Seki, et al.
  • Japanese Journal of Applied Physics, 58(SB), SBBK02

 

High mobility (>30 cm2 V-1 s-1) and low source/drain parasitic resistance In-Zn-O BEOL transistor with ultralow <10-20 A μm-1 off-state leakage current

  • N. Saito, et al.
  • Japanese Journal of Applied Physics, 58(SB), SBBJ07

 

Investigation of Switching-Induced Local Defects in Oxide-Based CBRAM Using Expanded Analytical Model of TDDB

  • R. Ichihara, et al.
  • IEEE Transactions on Electron Devices, 66(5), 8676360, pp. 2165-2171

 

A 25.6Gb/s Uplink-Downlink Interface Employing PAM-4-Based 4-Channel Multiplexing and Cascaded CDR Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems

  • T. Toi, et al.
  • Digest of Technical Papers - IEEE International Solid-State Circuits Conference, pp. 478 - 480

 

Device Challenges and Opportunities for ReRAM

  • K. Ota
  • IEEE International Reliability Physics Symposium, IRPS 2019 - Tutorial

 

3D Flash Memory - Electrical and Physical Characterizations for Memory Cell Reliability -

  • Y. Mitani
  • IEEE International Conference on Microelectronic Test Structures, ICMTS 2019 – Tutorial

2018年 主要学会発表・パブリケーションリスト

※:投稿時点で原則著者全員が当社従業員の学会発表・論文

Improving thickness uniformity of sputter-deposited films by using magnet rotation speed control technique

  • T. Miura, et al.
  • IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings, 2018-December, 8651152

 

Fixed charge control of silylated surface for stiction-free drying with surface energy reduction process

  • T. Koide, et al.
  • Solid State Phenomena, 282 SSP, pp. 168-174

 

Deep Learning in DFM Applications

  • T. Matsunawa, et. al.
  • Proceedings Volume 10810, Photomask Technology 2018; 1081006

 

プラズマが拓く半導体プロセスの未来 (依頼講演)

  • 栗原一彰
  • プラズマ・核融合学会 九州・沖縄・山口支部 第22回支部大会 研究発表 論文集、p.13

 

FPGA-Based CNN Processor with Filter-Wise-Optimized Bit Precision

  • A. Maki, et al.
  • Proceedings of 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC2018) pp.47-50

 

Non-Volatile Memory for Data Age (Invited)

  • K. Ishimaru
  • Proceedings of the International Conference on Solid-State and Integrated Technology 2018 (ICSICT-2018) pp. 1215-1218

 

Formation Mechanism of Sidewall Striation in High-Aspect-Ratio Hole Etching

  • M. Omura, et al.
  • 40th International Symposium on Dry Process (DPS2018), H-2, pp. 293-294

 

Footprints of RF CMOS Compact Modeling Technology from Wireless Communication to IoT Applications

  • S. Yoshitomi
  • Proceedings of 25th International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2018, 8436911, pp. 22-28

 

Evaluation of Electron Traps in SiN by Discharging Current Transient Spectroscopy: Verification of Validity by Comparing with Conventional DLTS

  • H. Seki, et al.
  • 2018 International Conference on Solid State Devices and Materials (SSDM2018) pp.325-326

 

High mobility (>30 cm2/Vs) and Low S/D Parasitic Resistance In-Zn-O BEOL Transistor with Ultralow (<10-20 A/μm) Off Leakage Current

  • N. Saito, et al.
  • 2018 International Conference on Solid State Devices and Materials (SSDM2018) pp.573-574

 

Performance improvement by template-induced crystallization in ferroelectric HfO2 tunnel junction memory for cross-point high-density application

  • S. Kabuyanagi, et al.
  • 2018 International Conference on Solid State Devices and Materials (SSDM2018) pp.205-206

 

Effect of Tin and Gallium Composition on the Instability of Amorphous Indium-Gallium-Zinc-Tin-Oxide (IGZTO) Thin-Film Transistors under Positive Gate Bias

  • D. Zhao, et al.
  • 2018 International Conference on Solid State Devices and Materials (SSDM2018) pp.805-806 (Late News)

 

Grain-Boundary-Limited Polycrystalline-Silicon Mobility with Negative Temperature Dependence ~ Modeling of Carrier Conduction through Grain-Boundary Traps Based on Trap-Assisted Tunneling ~

  • M. Hogyoku, et al.
  • 2018 International Conference on Solid State Devices and Materials (SSDM2018) pp. 825-826

 

Stacked Source/Drain Electrode Structure of InGaZnO Thin-Film-Transistor for Low Contact Resistance and Suppressing Channel Shortening Effect

  • J. Kataoka, et al.
  • 2018 International Conference on Solid State Devices and Materials (SSDM2018) pp.1269-1270 (Late News)

 

Comprehensive Study of Variability in Poly-Si Channel Nanowire Transistor ~ Grain Boundary effect in Variability ~

  • K. Ota, et al.
  • 2018 International Conference on Solid State Devices and Materials (SSDM2018) pp.235-236 (Late News)

 

Emerging Non-Volatile Memory and Thin-Film Transistor Technologies for Future 3D-LSI (Invited)

  • M. Saitoh, et al.
  • 48th European Solid-State Device Research Conference (ESSDERC) 2018, pp.138-141

 

Performance and Reliability of Ferroelectric HfO2 Tunnel Junction Memory (Invited)

  • S. Fujii, et al.
  • 2018 ISAF-FMA-AMF-AMEC-PFM Joint Conference (IFAAP2018)

 

Reliability of HfO2-based Ferroelectric Tunnel Junction Memory (Invited)

  • M. Yamaguchi, et al.
  • Non-Volatile Memory Technology Symposium 2018 (NVMTS2018)

 

A 12.8 Gb/s Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth and Large-Capacity Storage Systems

  • Y. Tsubouchi, et al.
  • IEEE Symposium on VLSI Circuits, Digest of Technical Papers, pp. 149-150

 

Suppression of channel shortening effect for InGaZnO Thin-Film-Transistor by In-Sn-O source/drain electrodes

  • J. Kataoka, et al.
  • 2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings 8421427, pp. 175-177

 

Origin of High Mobility in InSnZnO MOSFETs

  • N. Saito, et al.
  • 2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 -Proceedings 8421530, pp. 172-174

 

3D Flash Memory for Data-Intensive Applications (Keynote)

  • S. Inaba
  • 2018 IEEE 10th International Memory Workshop, IMW 2018 pp. 1-4

 

Comprehensive investigation on parameter extraction methodology for short channel amorphous-InGaZnO thin-film transistor

  • C. Tanaka, et al.
  • IEEE International Conference on Microelectronic Test Structures 2018-March, pp. 23-26

 

Cooperative simulation of lithography and topography for three-dimensional high-aspect-ratio etching

  • T. Ichikawa, et al.
  • Japanese Journal of Applied Physics 57(6), 06JC01

 

Multiscale modeling for SiO2 atomic layer deposition for high-aspect-ratio hole patterns

  • Y. Miyano, et al.
  • Japanese Journal of Applied Physics 57(6), 06JB03

 

Hot carrier degradation, TDDB, and 1/f noise in Poly-Si Tri-gate nanowire transistor

  • Y. Yoshimura, et al.
  • IEEE International Reliability Physics Symposium Proceedings 2018-March, pp. 5A.61-5A.66

 

Density-functional study on the dopant-segregation mechanism: Chemical potential dependence of dopant-defect complex at Si/SiO2 interface

  • H. Kawai, et al.
  • Journal of Applied Physics 123(16), 161425

 

Charge-based Neuromorphic Cell by InGaZnO Transistor and Implementation of Simple Scheme Spike-Timing-Dependent Plasticity

  • C. Tanaka, et al.
  • Proceedings - IEEE International Symposium on Circuits and Systems 2018-May, 8350932

Hotspot detection based on surrounding optical feature

  • Y. Abe, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering 10588, 105880I

 

Updates of nanoimprint lithography for production and applications for next generation memory devices

  • T. Higashiki
  • Proceedings of SPIE - The International Society for Optical Engineering 10584, 105840T

 

Origin of high mobility in InSnZnO MOSFETs

  • N. Saito, et al.
  • IEEE Journal of the Electron Devices Society 6,8546783, pp. 1258-1262

 

3D Flash MemoryにおけるALD技術の応用

  • 相宗 史記
  • 化学工学会 CVD反応分科会主催第28回シンポジウム 「アトミックレイヤープロセッシングの基礎と最新技術動向」, 2018年6月4日

2017年 主要学会発表・パブリケーションリスト

※:投稿時点で原則著者全員が当社従業員の学会発表・論文

Study of CO2 ashing for porous SiOCH film using 100 MHz/13.56 MHz dual frequency superimposed capacitive coupled plasma

  • T. Imamura, et al.
  • Journal of Vacuum Science and Technology B: Nanotechnology and Microelectronics 35(6), 062201

 

Development of an Energy-Saving Controller for Sub Apparatus

  • T. Ozaki
  • IEEE Transactions on Semiconductor Manufacturing 30(4), 8057857, pp. 367-370

 

機械学習で切り開く新しいリソグラフイ・DFM 技術(招待講演)

  • 松縄 哲明
  • 信学技報, vol. 117, no. 273, VLD2017-50, pp. 131-131, 2017年11月

 

Metrology and inspection required for next generation lithography

  • M. Asano, et al.
  • Japanese Journal of Applied Physics 56(6), 06GA01

 

Application of EB repair for nanoimprint lithography template

  • A, Kumada, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering 10454, 104540Q

 

Accurate lithography simulation model based on convolutional neural networks

  • Y. Watanabe, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering 10454, 104540I

 

DUV inspection beyond optical resolution limit for EUV mask of hp 1X nm

  • M. Naka, et al.
  • Proceedings of SPIE - The International Society for Optical Engineering 10451, 104510K

 

Multi-scale modeling for SiO2 plasma-enhanced atomic layer deposition at high-aspect-ratio hole patterns

  • Y. Miyano, et al.
  • 39th International Symposium on Dry Process (DPS2017), B-3, pp. 19-20